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Lead Analog IC Designer

Lead the design of high-speed SerDes circuit blocks for next-generation semiconductor chips
San Jose, California, United States
Senior
$114,800 – 213,200 USD / year
1 week ago
Cadence

Cadence

Provides electronic design automation software and IP for designing, verifying, and optimizing complex semiconductor chips and systems.

At Cadence, We Hire And Develop Leaders And Innovators Who Want To Make An Impact On The World Of Technology.

The lead Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.

Candidate's background should include a minimum of 3 years of experience in CMOS SerDes or high-speed I/O IC design and development

Working knowledge of a set of common SerDes standards and their electrical requirements is a plus

Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators

Excellent problem solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment

Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification

Cadence tool experience, lab test experience, and design experience at >112Gbps and in <7nm technologies are a plus

MS or PhD in EE

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Lead Analog IC Designer
San Jose, California, United States
$114,800 – 213,200 USD / year
Design
About Cadence
Provides electronic design automation software and IP for designing, verifying, and optimizing complex semiconductor chips and systems.